An isolated DC/DC converter uses power transformer windings to provide voltage conversion and galvanic isolation for the load. A volt-second clamp is commonly used in isolated DC/DC converters to limit the excursion of the magnetic flux density in the power transformer that occurs when voltage is applied. If a given voltage is applied for a long period of time, then the magnetic flux density will increase to the point of saturation, with potentially damaging results to the DC/DC converter. Typically, the volt-second clamp is provided in a pulse width modulation (PWM) controller, which is used to control the power switches that apply voltage to the power transformer.
FIG. 1 shows a conventional isolated DC/DC converter having a power transformer T1. An input voltage VIN is supplied to the primary winding of the transformer T1 to provide an output voltage Vout to a load coupled to the secondary winding of the transformer T1. A volt-second clamp circuit 10 is provided on a PWM controller integrated circuit (IC) used to control a power switch M1 that applies voltage to the power transformer T1. The volt-second clamp circuit 10 comprises a voltage comparator U1 used to limit the on-time of the power switch M1. When the volt-second limit has been reached, M1 will be turned off, even if the PWM signal is still high. When the power switch M1 is on and voltage is being applied to the transformer T1, switch M2 coupled to the positive input of the comparator U1 will be off and an external RC charging circuit is allowed to charge, increasing the voltage on the positive input of the comparator U1. If this voltage increases above the reference level VR, the comparator output goes high, indicating that the volt-second limit has been reached. The comparator output signal resets latch U2 coupled via AND gate G1 to the switch M1, causing M1 to turn off. When M1 is off, switch M2 controlled via inverter G2 discharges the capacitor C in the RC charging circuit.
In the volt-second circuit 10, the on-time of the switch M1 is therefore limited to an amount of volt-second clamp time tCL given by:
            t      CL        =          RC      ·              ln        ⁡                  (                                    V              IN                                                      V                IN                            -                              V                R                                              )                      ,where R and C are values of resistor R and capacitor C in the RC charging circuit. This expression can be expanded as:
      t    CL    =      RC    ·                  [                              (                                          V                R                                            V                IN                                      )                    +                                    1              2                        ⁢                                          (                                                      V                    R                                                        V                    IN                                                  )                            2                                +                                    1              3                        ⁢                                          (                                                      V                    R                                                        V                    IN                                                  )                            3                                +          ⃛                ⁢                                  ]            .      If VIN>>VR, then this can be approximated with the first order term as:
      t    CL    =      RC    ·                  (                              V            R                                V            IN                          )            .      
In the above equation, the volt-second clamp time tCL is inversely proportional to transformer voltage VIN. Therefore, for a given value of VR, R and C, the product of tCL and VIN will be constant, meaning that the maximum allowed volt-second product on the transformer will also be constant as VIN is varied. Since the resistor and capacitor are external to the PWM controller IC, the overall accuracy of the volt-second clamp can be very good. Typically the accuracy of the reference and comparator are excellent (1% or better), and any variation in circuit delay is small relative to the volt-second clamp time (3% or less). Consequently, the accuracy of the volt-second clamp can readily be 5% or better, depending on the tolerance of the external resistor and capacitor.
In some applications, however, it is not the case that VIN>>VR. As a result, there can be substantial errors in the above volt-second clamp as the input voltage is varied. For example, if the volt-second clamp resides on the primary side of the DC/DC converter, and the input voltage is relatively low, such errors will be present. This will also be a problem if the volt-second clamp resides on the secondary side of the DC/DC converter, and the output voltage is relatively low.
This case is illustrated in FIG. 2, that shows a conventional volt-second clamp circuit 20. The voltage VSW on the secondary side of the transformer T1 is used to feed the RC charging circuit. Diodes D1 and D2, inductor L and output capacitor Co are provided on the secondary side of the transformer T1. If the output voltage VOUT is low, then the voltage VSW will also be relatively low, thereby causing volt-second clamp inaccuracy. In either of these cases, the exponential nature of volt-second clamp as it is commonly used will result in substantial errors. Such degraded performance can compromise the ability of the volt-second clamp to prevent transformer core saturation.
One obvious solution is to decrease the value of the reference voltage VR. However, the value of the reference voltage VR is practically limited to approximately 0.5V or greater in order to minimize inaccuracies arising from comparator offset voltage or from system noise. Therefore, this approach is not effective in improving the overall accuracy.
A second approach is to make use of a more complex volt-second clamp architecture that typically uses an analog multiplier/divider to create a current that is inversely proportional to the input voltage. This current is then used to charge a capacitor that resides within the PWM controller integrated circuit. Such a circuit is illustrated in FIG. 3.
In the circuit of FIG. 3, an external resistor divider composed of resistors R1, R2 is used to provide adjustability. A volt-second clamp circuit 30 in FIG. 3 includes an analog multiplier/divider circuit 22 that divides voltage value VB1 by a voltage value produced at the node between resistors R1 and R2. The output of the multiplier/divider 22 controls transconductance amplifier GM, coupled to the positive input of the comparator U1, together with switch M2 and integrated circuit capacitor C. Voltage VB2 is supplied to the transconductance amplifier GM. The on-time of the switch M1 is limited by the volt-second clamp time
      t    CL    =            C      ·              (                                            V                              B                ⁢                                                                  ⁢                1                                      ⁢                          V              R                                                          G              M                        ⁢                          V              IN                                      )              ⁢          (                        R          ⁢                                          ⁢          2                                      R            ⁢                                                  ⁢            1                    +                      R            ⁢                                                  ⁢            2                              )      which results in the desired constant volt-second limit.
There are however, two significant disadvantages of the circuit in FIG. 3. First, the accuracy of the analog multiplier/divider circuit 22 is limited, especially when used over a wide range of inputs. Second, the tolerance of the integrated circuit capacitor C is very poor, generally 10-15%. As a result, the overall accuracy of the circuit 20 is likewise poor.
In order to remove the error associated with the capacitor tolerance, some solutions have included a feedback loop to adjust the value of the reference voltage VR. Examples of these solutions can be seen in U.S. Pat. Nos. 5,710,697 and 6,922,356. While these solutions can provide reasonably good accuracy, they suffer from the delay time associated with a feedback loop. This long delay time can result in a failure to limit the volt-second product applied to the transformer T for a period of time, potentially resulting in core saturation. In addition, the use of the feedback loop in addition to the analog multiplier/divider results in a substantially complex system.
Hence, there is a need for a technique that would improve accuracy of the volt-second clamp without disadvantages of prior art solutions discussed above.